Scientists from IBM have unveiled the first neurosynaptic computer chip to achieve an unprecedented scale of 1-million programmable neurons, 256-million programmable synapses and 46-billion synaptic operations per second per watt.
At 5,4-billion transistors, this fully functional and production-scale chip is currently one of the largest CMOS chips ever built, yet, while running at biological realtime, it consumes a minuscule 70mW – orders of magnitude less power than a modern microprocessor.
A neurosynaptic supercomputer the size of a postage stamp that runs on the energy equivalent of a hearing-aid battery, this technology could transform science, technology, business, government, and society by enabling vision, audition and multi-sensory applications.
The breakthrough, published in Science in collaboration with Cornell Tech, is a significant step towards bringing cognitive computers to society.
There is a huge disparity between the human brain’s cognitive capability and ultra-low power consumption when compared to today’s computers. To bridge the divide, IBM scientists created something that didn’t previously exist – an entirely new neuroscience-inspired scalable and efficient computer architecture that breaks path with the prevailing von Neumann architecture used almost universally since 1946.
This second generation chip is the culmination of almost a decade of research and development, including the initial single core hardware prototype in 2011 and software ecosystem with a new programming language and chip simulator in 2013.
The new cognitive chip architecture has an on-chip two-dimensional mesh network of 4096 digital, distributed neurosynaptic cores, where each core module integrates memory, computation, and communication, and operates in an event-driven, parallel, and fault-tolerant fashion.
To enable system scaling beyond single-chip boundaries, adjacent chips, when tiled, can seamlessly connect to each other—building a foundation for future neurosynaptic supercomputers. To demonstrate scalability, IBM also revealed a 16-chip system with sixteen million programmable neurons and four billion programmable synapses.
“IBM has broken new ground in the field of brain-inspired computers, in terms of a radically new architecture, unprecedented scale, unparalleled power/area/speed efficiency, boundless scalability, and innovative design techniques.
“We foresee new generations of information technology systems – that complement today’s von Neumann machines – powered by an evolving ecosystem of systems, software, and services,” says Dr Dharmendra Modha, IBM fellow and IBM chief scientist, Brain-Inspired Computing, IBM Research.
“These brain-inspired chips could transform mobility, via sensory and intelligent applications that can fit in the palm of your hand but without the need for WiFi. This achievement underscores IBM’s leadership role at pivotal transformational moments in the history of computing via long-term investment in organic innovation.”
The Defense Advanced Research Projects Agency (DARPA) has funded the project since 2008 with approximately $53-million via Phase 0, Phase 1, Phase 2 and Phase 3 of the Systems of Neuromorphic Adaptive Plastic Scalable Electronics (SyNAPSE) program. Current collaborators include Cornell Tech and iniLabs.
The chip was fabricated using Samsung’s 28nm process technology that has a dense on-chip memory and low-leakage transistors.
“It is an astonishing achievement to leverage a process traditionally used for commercially available, low-power mobile devices to deliver a chip that emulates the human brain by processing extreme amounts of sensory information with very little power,” says Shawn Han, vice-president of Foundry Marketing at Samsung Electronics.
“This is a huge architectural breakthrough that is essential as the industry moves toward the next-generation cloud and big-data processing. It’s a pleasure to be part of technical progress for next-generation through Samsung’s 28nm technology.”
The event-driven circuit elements of the chip used the asynchronous design methodology developed at Cornell Tech and refined with IBM since 2008.
“After years of collaboration with IBM, we are now a step closer to building a computer similar to our brain,” says Professor Rajit Manohar, Cornell Tech.
The combination of cutting-edge process technology, hybrid asynchronous-synchronous design methodology, and new architecture has led to a power density of 20mW/cm2 which is nearly four orders of magnitude less than today’s microprocessors.
